mirror of
https://github.com/g4klx/MMDVM.git
synced 2026-10-23 19:15:00 +02:00
Use a proper master I2C driver.
This commit is contained in:
Jonathan Naylor
+173
-175
@@ -23,219 +23,217 @@
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#include "I2CPort.h"
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#if defined(STM32F4XX)
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#include "stm32f4xx.h"
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#include "stm32f4xx_i2c.h"
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#elif defined(STM32F7XX)
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#include "stm32f7xx.h"
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#include "stm32f7xx_i2c.h"
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#endif
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#include "Globals.h"
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const uint32_t I2C_CLK_FREQ = 100000U; // XXX FIXME
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const uint16_t I2C_ADDR = 0U; // XXX FIXME
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extern "C" {
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#if defined(I2C_REPEATER)
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void I2C1_EV_IRQHandler(void)
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{
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i2C1.eventHandler();
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}
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void I2C1_ER_IRQHandler(void)
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{
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if (I2C_GetITStatus(I2C1, I2C_IT_AF))
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I2C_ClearITPendingBit(I2C1, I2C_IT_AF);
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}
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#endif
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#ifdef notdef
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void I2C2_EV_IRQHandler(void)
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{
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i2C2.eventHandler();
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}
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void I2C2_ER_IRQHandler(void)
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{
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if (I2C_GetITStatus(I2C2, I2C_IT_AF))
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I2C_ClearITPendingBit(I2C2, I2C_IT_AF);
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}
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#endif
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#if defined(MODE_OLED)
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void I2C3_EV_IRQHandler(void)
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{
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i2C3.eventHandler();
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}
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void I2C3_ER_IRQHandler(void)
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{
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if (I2C_GetITStatus(I2C3, I2C_IT_AF))
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I2C_ClearITPendingBit(I2C3, I2C_IT_AF);
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}
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#endif
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}
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//GPIO and I2C Peripheral (I2C3 Configuration)
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#define RCC_AHB1Periph_GPIO_SCL RCC_AHB1Periph_GPIOA //Bus for GPIO Port of SCL
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#define RCC_AHB1Periph_GPIO_SDA RCC_AHB1Periph_GPIOC //Bus for GPIO Port of SDA
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#define GPIO_AF_I2Cx GPIO_AF_I2C3 //Alternate function for GPIO pins
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#define GPIO_SCL GPIOA
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#define GPIO_SDA GPIOC
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#define GPIO_Pin_SCL GPIO_Pin_8
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#define GPIO_Pin_SDA GPIO_Pin_9
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#define GPIO_PinSource_SCL GPIO_PinSource8
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#define GPIO_PinSource_SDA GPIO_PinSource9
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CI2CPort::CI2CPort(uint8_t n) :
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m_n(n),
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m_ok(false),
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m_fifo(),
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m_fifoHead(0U),
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m_fifoTail(0U)
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m_port(NULL),
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m_clock(0x00U),
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m_ok(true),
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m_addr(0x00U)
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{
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switch (n) {
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case 1U:
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m_port = I2C1;
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m_clock = RCC_APB1Periph_I2C1;
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m_busSCL = RCC_AHB1Periph_GPIOB;
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m_busSDA = RCC_AHB1Periph_GPIOB;
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m_af = GPIO_AF_I2C1;
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m_gpioSCL = GPIOB;
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m_gpioSDA = GPIOB;
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m_pinSCL = GPIO_Pin_8;
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m_pinSDA = GPIO_Pin_9;
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m_pinSourceSCL = GPIO_PinSource8;
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m_pinSourceSDA = GPIO_PinSource9;
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break;
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case 3U:
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m_port = I2C3;
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m_clock = RCC_APB1Periph_I2C3;
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m_busSCL = RCC_AHB1Periph_GPIOA;
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m_busSDA = RCC_AHB1Periph_GPIOC;
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m_af = GPIO_AF_I2C3;
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m_gpioSCL = GPIOA;
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m_gpioSDA = GPIOC;
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m_pinSCL = GPIO_Pin_8;
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m_pinSDA = GPIO_Pin_9;
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m_pinSourceSCL = GPIO_PinSource8;
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m_pinSourceSDA = GPIO_PinSource9;
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break;
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default:
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m_ok = false;
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break;
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}
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}
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bool CI2CPort::init()
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{
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I2C_TypeDef* i2CPort = NULL;
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uint32_t i2CClock = 0U;
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uint32_t i2CPins = 0U;
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uint8_t i2CIrq = 0U;
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switch (m_n) {
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case 1U:
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i2CPort = I2C1;
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i2CIrq = I2C1_EV_IRQn;
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i2CClock = RCC_APB1Periph_I2C1;
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i2CPins = GPIO_Pin_8 | GPIO_Pin_9; // PB8 PB9, P25 NXDN LEDs
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break;
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case 2U:
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i2CPort = I2C2;
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i2CIrq = I2C2_EV_IRQn;
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i2CClock = RCC_APB1Periph_I2C2;
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i2CPins = GPIO_Pin_10 | GPIO_Pin_11;
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break;
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case 3U:
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i2CPort = I2C3;
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i2CIrq = I2C3_EV_IRQn;
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i2CClock = RCC_APB1Periph_I2C3;
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i2CPins = GPIO_Pin_8 | GPIO_Pin_9; // PA8 PC9 XXX FIXME
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break;
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default:
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return false;
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}
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GPIO_InitTypeDef GPIO_InitStructure;
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NVIC_InitTypeDef NVIC_InitStructure;
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I2C_InitTypeDef I2C_InitStructure;
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RCC_AHB1PeriphClockCmd(i2CClock, ENABLE);
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE);
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// RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_AFIO, ENABLE);
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// Configure I2C GPIOs
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GPIO_InitStructure.GPIO_Pin = i2CPins;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
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GPIO_Init(GPIOB, &GPIO_InitStructure);
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// Configure the I2C event interrupt
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NVIC_InitStructure.NVIC_IRQChannel = i2CIrq;
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NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 15;
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NVIC_InitStructure.NVIC_IRQChannelSubPriority = 15;
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NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&NVIC_InitStructure);
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// Configure the I2C error interrupt
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NVIC_InitStructure.NVIC_IRQChannel = i2CIrq;
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NVIC_Init(&NVIC_InitStructure);
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// I2C configuration
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I2C_InitStructure.I2C_Mode = I2C_Mode_I2C;
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I2C_InitStructure.I2C_DutyCycle = I2C_DutyCycle_2;
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I2C_InitStructure.I2C_OwnAddress1 = I2C_ADDR << 1;
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I2C_InitStructure.I2C_Ack = I2C_Ack_Enable;
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I2C_InitStructure.I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit;
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I2C_InitStructure.I2C_ClockSpeed = I2C_CLK_FREQ;
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if (!m_ok)
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return false;
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// Enable I2C
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I2C_Cmd(i2CPort, ENABLE);
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// Apply I2C configuration
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I2C_Init(i2CPort, &I2C_InitStructure);
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RCC_APB1PeriphClockCmd(m_clock, ENABLE);
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I2C_ITConfig(i2CPort, I2C_IT_EVT, ENABLE);
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I2C_ITConfig(i2CPort, I2C_IT_BUF, ENABLE);
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I2C_ITConfig(i2CPort, I2C_IT_ERR, ENABLE);
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// Reset the Peripheral
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RCC_APB1PeriphResetCmd(m_clock, ENABLE);
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RCC_APB1PeriphResetCmd(m_clock, DISABLE);
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// Enable the GPIOs for the SCL/SDA Pins
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RCC_AHB1PeriphClockCmd(m_busSCL | m_busSDA, ENABLE);
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// Configure and initialize the GPIOs
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GPIO_InitTypeDef GPIO_InitStructure;
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GPIO_InitStructure.GPIO_Pin = m_pinSCL;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
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GPIO_InitStructure.GPIO_OType = GPIO_OType_OD;
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GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
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GPIO_Init(m_gpioSCL, &GPIO_InitStructure);
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m_fifoHead = 0U;
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m_fifoTail = 0U;
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GPIO_InitStructure.GPIO_Pin = m_pinSDA;
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GPIO_Init(m_gpioSDA, &GPIO_InitStructure);
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// Connect GPIO pins to peripheral
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GPIO_PinAFConfig(m_gpioSCL, m_pinSourceSCL, m_af);
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GPIO_PinAFConfig(m_gpioSDA, m_pinSourceSDA, m_af);
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// Configure and Initialize the I2C
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I2C_InitTypeDef I2C_InitStructure;
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I2C_InitStructure.I2C_Mode = I2C_Mode_I2C;
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I2C_InitStructure.I2C_DutyCycle = I2C_DutyCycle_2;
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I2C_InitStructure.I2C_OwnAddress1 = 0x00U; //We are the master. We don't need this
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I2C_InitStructure.I2C_Ack = I2C_Ack_Enable;
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I2C_InitStructure.I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit;
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I2C_InitStructure.I2C_ClockSpeed = 50000U; //400kHz (Fast Mode) (
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// Initialize the Peripheral
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I2C_Init(m_port, &I2C_InitStructure);
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// I2C Peripheral Enable
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I2C_Cmd(m_port, ENABLE);
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m_ok = true;
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return true;
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}
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uint8_t CI2CPort::write(const uint8_t* data, uint8_t length)
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uint8_t CI2CPort::write(uint8_t addr, const uint8_t* data, uint16_t length)
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{
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if (!m_ok)
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return 6U;
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for (uint16_t i = 0U; i < length; i++)
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fifoPut(data[i]);
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// Generate a Start condition
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bool ret = start();
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if (!ret)
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return 7U;
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// Set I2C device address if needed
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if (addr != m_addr) {
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ret = setAddr(addr, I2C_Direction_Transmitter);
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if (!ret)
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return 7U;
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m_addr = addr;
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}
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// Unstretch the clock by just reading SR2 (Physically the clock is continued to be strectehed because we have not written anything to the DR yet.)
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(void) m_port->SR2;
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// Start Writing Data
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while (length--) {
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ret = write(*data++);
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if (!ret)
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return 7U;
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}
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// Wait for the data on the shift register to be transmitted completely
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ret = waitSR1FlagsSet(I2C_SR1_BTF);
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if (!ret)
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return 7U;
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// Here TXE=BTF=1. Therefore the clock stretches again.
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// Order a stop condition at the end of the current tranmission (or if the clock is being streched, generate stop immediatelly)
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m_port->CR1 |= I2C_CR1_STOP;
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// Stop condition resets the TXE and BTF automatically.
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// Wait to be sure that line is iddle
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ret = waitLineIdle();
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if (!ret)
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return 7U;
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return 0U;
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}
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void CI2CPort::eventHandler()
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bool CI2CPort::write(uint8_t c)
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{
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I2C_TypeDef* i2CPort = NULL;
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switch (m_n) {
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case 1U:
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i2CPort = I2C1;
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break;
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case 2U:
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i2CPort = I2C2;
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break;
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case 3U:
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i2CPort = I2C3;
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break;
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default:
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return;
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}
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uint32_t event = I2C_GetLastEvent(i2CPort);
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switch (event) {
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case I2C_EVENT_MASTER_BYTE_TRANSMITTED:
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if (fifoLevel() > 0U) {
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I2C_SendData(i2CPort, m_fifo[m_fifoTail]);
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m_fifoTail++;
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if (m_fifoTail >= I2C_TX_FIFO_SIZE)
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m_fifoTail = 0U;
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}
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break;
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default:
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break;
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}
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// Write the byte to the DR
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m_port->DR = c;
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// Wait till the content of DR is transferred to the shift Register.
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return waitSR1FlagsSet(I2C_SR1_TXE);
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}
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uint16_t CI2CPort::fifoLevel()
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bool CI2CPort::setAddr(uint8_t addr, uint8_t dir)
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{
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uint32_t tail = m_fifoTail;
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uint32_t head = m_fifoHead;
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if (tail > head)
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return I2C_TX_FIFO_SIZE + head - tail;
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else
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return head - tail;
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// Write address to the DR (to the bus)
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m_port->DR = (addr << 1) | dir;
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// Wait till ADDR is set (ADDR is set when the slave sends ACK to the address).
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// Clock streches till ADDR is Reset. To reset the hardware i)Read the SR1 ii)Wait till ADDR is Set iii)Read SR2
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// Note1:Spec_p602 recommends the waiting operation
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// Note2:We don't read SR2 here. Therefore the clock is going to be streched even after return from this function
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return waitSR1FlagsSet(I2C_SR1_ADDR);
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}
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bool CI2CPort::fifoPut(uint8_t next)
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bool CI2CPort::start()
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{
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// Generate a start condition. (As soon as the line becomes idle, a Start condition will be generated)
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m_port->CR1 |= I2C_CR1_START;
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// When start condition is generated SB is set and clock is stretched.
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// To activate the clock again i)read SR1 ii)write something to DR (e.g. address)
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return waitSR1FlagsSet(I2C_SR1_SB); //Wait till SB is set
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}
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bool CI2CPort::waitSR1FlagsSet(uint32_t flags)
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{
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if (fifoLevel() >= I2C_TX_FIFO_SIZE)
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return false;
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// Wait till the specified SR1 Bits are set
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// More than 1 Flag can be "or"ed. This routine reads only SR1.
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uint32_t timeOut = HSI_VALUE;
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while(((m_port->SR1) & flags) != flags) {
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if (!(timeOut--))
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return false;
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}
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m_fifo[m_fifoHead] = next;
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return true;
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}
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m_fifoHead++;
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if (m_fifoHead >= I2C_TX_FIFO_SIZE)
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m_fifoHead = 0U;
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bool CI2CPort::waitLineIdle()
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{
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// Wait till the Line becomes idle.
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uint32_t timeOut = HSI_VALUE;
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// Check to see if the Line is busy
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// This bit is set automatically when a start condition is broadcasted on the line (even from another master)
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// and is reset when stop condition is detected.
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while((m_port->SR2) & (I2C_SR2_BUSY)) {
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if (!(timeOut--))
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return false;
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}
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return true;
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}
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